Semiconductor Engineering

Locking When Emulating Xtensa LX Multi-Core On A Xilinx FPGA

Today’s high-performance computing systems often require the designer to instantiate multiple CPU or DSP cores in their subsystem. However, the performance gained by using multiple CPUs comes with ...
Electronics Weekly

Xilinx hardwires Cortex-A9 MPCore processor into FPGA

Xilinx has introduced its first FPGA design platform with an embedded ARM Cortex-A9 MPCore processor. Xilinx has worked with ARM for over a year to allow the programmable logic elements of the FPGA, ...
Design-Reuse

Xilinx ISE Design Suite 13.2 Steps Up Designer Productivity and Brings Partial Reconfiguration to Kintex-7, Virtex-7 FPGAs

Latest release also includes improvements for Virtex-7 Quality of Results, enhancements to PlanAhead and continues delivering on Plug-and-Play IP initiative SAN JOSE, Calif., July 6, 2011-- Xilinx, ...
Electronics Weekly

Xilinx rolls out IP cores for AMBA AXI4-based FPGAs

Xilinx has started its introduction of intellectual property (IP) cores that meet the AMBA 4 AXI4 bus specification for on-chip interconnections in its FPGAs. Xilinx’s interest in the AMBA AXI4 ...
Design-Reuse

Comparing AMBA AHB to AXI Bus using System Modeling

Embedded system designers have a choice of using a shared or point-to-point bus in their designs. Typically, an embedded design will have a general purpose processor, cache, SDRAM, DMA port, and ...